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authorCarl Ritson <carl.ritson@amd.com>2025-10-28 16:09:28 +0900
committerGitHub <noreply@github.com>2025-10-28 16:09:28 +0900
commit385c12134aa6b3215d92ce6034d99fd7aec45dd7 (patch)
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parentc1779f33bdada6e478e882cc23a647ef9abaad96 (diff)
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[AMDGPU] Rework GFX11 VALU Mask Write Hazard (#138663)
Apply additional counter waits to address VALU writes to SGPRs. Rework expiry detection and apply wait coalescing to mitigate some of the additional waits.
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