[AMDGPU][DAG] Enable ganging up of memcpy loads/stores for AMDGPU (#96185)

In the SelectionDAG lowering of the memcpy intrinsic, this optimization
introduces additional chains between fixed-size groups of loads and the
corresponding stores. While initially introduced to ensure that wider
load/store-pair instructions are generated on AArch64, this optimization
also improves code generation for AMDGPU: Ganged loads are scheduled
into a clause; stores only await completion of their corresponding load.

The chosen value of 16 performed good in microbenchmarks, values of 8,
32, or 64 would perform similarly.
The testcase updates are autogenerated by
utils/update_llc_test_checks.py.

See also:
 - PR introducing this optimization: https://reviews.llvm.org/D46477

Part of SWDEV-455845.

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