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| author | Clement Courbet <courbet@google.com> | 2019-09-27 08:04:10 +0000 |
|---|---|---|
| committer | Clement Courbet <courbet@google.com> | 2019-09-27 08:04:10 +0000 |
| commit | 8ef97e1aad77bfb8f562c2b5ee0944a5eca44e84 (patch) | |
| tree | 6ff028c7bf4191eaa23937c17e701eda6fcf34bf /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h | |
| parent | e0fad09f6c287ee26f6450da16ac8500c6bc8368 (diff) | |
| download | llvm-8ef97e1aad77bfb8f562c2b5ee0944a5eca44e84.zip llvm-8ef97e1aad77bfb8f562c2b5ee0944a5eca44e84.tar.gz llvm-8ef97e1aad77bfb8f562c2b5ee0944a5eca44e84.tar.bz2 | |
[llvm-exegesis] Refactor how forbidden registers are computed.
Summary:
Right now latency generation can incorrectly select the scratch register
as a dependency-carrying register.
- Move the logic for preventing register selection from Uops
implementation to common SnippetGenerator class.
- Aliasing detection now takes a set of forbidden registers just like
random register assignment does.
Reviewers: gchatelet
Subscribers: tschuett, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D68084
llvm-svn: 373048
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h')
0 files changed, 0 insertions, 0 deletions