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| author | David Green <david.green@arm.com> | 2020-06-25 13:25:38 +0100 |
|---|---|---|
| committer | David Green <david.green@arm.com> | 2020-06-25 15:59:36 +0100 |
| commit | 3cb2190b0ba3f54d6b540ba8ba44f5c26c6e898f (patch) | |
| tree | a530b5d35d3b794ec0ec373bac315d09cf77ba4c /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h | |
| parent | da852b03b009141b1deda8c4bda83149d64e7666 (diff) | |
| download | llvm-3cb2190b0ba3f54d6b540ba8ba44f5c26c6e898f.zip llvm-3cb2190b0ba3f54d6b540ba8ba44f5c26c6e898f.tar.gz llvm-3cb2190b0ba3f54d6b540ba8ba44f5c26c6e898f.tar.bz2 | |
[ARM] MVE VCVT lowering for f32->f16 truncs
This adds code to lower f32 to f16 fp_trunc's using a pair of MVE VCVT
instructions. Due to v4f16 not being legal, fp_round are often split up
fairly early. So this reconstructs the vcvt's from a buildvector of
fp_rounds from two vector inputs. Something like:
BUILDVECTOR(FP_ROUND(EXTRACT_ELT(X, 0),
FP_ROUND(EXTRACT_ELT(Y, 0),
FP_ROUND(EXTRACT_ELT(X, 1),
FP_ROUND(EXTRACT_ELT(Y, 1), ...)
It adds a VCVTN node to handle this, which like VMOVN or VQMOVN lowers
into the top/bottom lanes of an MVE instruction.
Differential Revision: https://reviews.llvm.org/D81139
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPythonImpl.h')
0 files changed, 0 insertions, 0 deletions