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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2024-08-22 11:11:00 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-08-22 11:11:00 +0100 |
| commit | f67388232384682fb442d6e5501d9259c41fd714 (patch) | |
| tree | 6a3aa244b2d8467748ff866712652b49a5ea7b06 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h | |
| parent | 51ca2354d0a4083b9219df131ceff98bccb622b4 (diff) | |
| download | llvm-f67388232384682fb442d6e5501d9259c41fd714.zip llvm-f67388232384682fb442d6e5501d9259c41fd714.tar.gz llvm-f67388232384682fb442d6e5501d9259c41fd714.tar.bz2 | |
[X86] Allow speculative BSR/BSF instructions on targets with CMOV (#102885)
Currently targets without LZCNT/TZCNT won't speculate with BSR/BSF instructions in case they have a zero value input, meaning we always insert a test+branch for the zero-input case.
This patch proposes we allow speculation if the target has CMOV, and perform a branchless select instead to handle the zero input case. This will predominately help x86-64 targets where we haven't set any particular cpu target. We already always perform BSR/BSF instructions if we were lowering a CTLZ/CTTZ_ZERO_UNDEF instruction.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h')
0 files changed, 0 insertions, 0 deletions