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| author | Graham Hunter <graham.hunter@arm.com> | 2024-09-23 13:35:23 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-23 13:35:23 +0100 |
| commit | 785337e2d97a712612a5956657e8dbf1cd140e46 (patch) | |
| tree | 22fcccb2eb989f523f8caf1a3dc5fa448a3b86e1 /lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h | |
| parent | 7773dcd16389b07e055a10336c42e71ffd57ad3d (diff) | |
| download | llvm-785337e2d97a712612a5956657e8dbf1cd140e46.zip llvm-785337e2d97a712612a5956657e8dbf1cd140e46.tar.gz llvm-785337e2d97a712612a5956657e8dbf1cd140e46.tar.bz2 | |
[LV][AArch64] Don't query registers for illegal scalable vector elts (#109411)
When trying to maximize vector bandwidth we ask TTI for the number of
registers required for a given operation. If the type of that operation
happens to be something illegal for scalable vectors (e.g.
<vscale x 4 x fp128>) then we would see a crash.
Instead, just return a default value and let the cost model reject the
invalid operation later.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/ScriptInterpreterPython.h')
0 files changed, 0 insertions, 0 deletions