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| author | Kiran <kiran.sturt@arm.com> | 2024-08-08 13:07:24 +0100 |
|---|---|---|
| committer | Kiran <kiran.sturt@arm.com> | 2024-08-27 10:44:06 +0100 |
| commit | a2088a24dad31ebe44c93751db17307fdbe1f0e2 (patch) | |
| tree | 9ad03c850e3309f86f20c869b8fc96d529a0a918 /lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h | |
| parent | ca3b9af98c0b119598bc26a9130f468b196d83b3 (diff) | |
| download | llvm-a2088a24dad31ebe44c93751db17307fdbe1f0e2.zip llvm-a2088a24dad31ebe44c93751db17307fdbe1f0e2.tar.gz llvm-a2088a24dad31ebe44c93751db17307fdbe1f0e2.tar.bz2 | |
[ARM] musttail fixes
Backend:
- Caller and callee arguments no longer have to match, just to take up the same space, as they can be changed before the call
- Allowed tail calls if callee and callee both (or neither) use sret, wheras before it would be dissalowed if either used sret
- Allowed tail calls if byval args are used
- Added debug trace for IsEligibleForTailCallOptimisation
Frontend (clang):
- Do not generate extra alloca if sret is used with musttail, as the space for the sret is allocated already
Change-Id: Ic7f246a7eca43c06874922d642d7dc44bdfc98ec
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h')
0 files changed, 0 insertions, 0 deletions