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| author | Eli Friedman <efriedma@quicinc.com> | 2022-09-05 12:59:39 -0700 |
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| committer | Eli Friedman <efriedma@quicinc.com> | 2022-09-05 12:59:39 -0700 |
| commit | 4658366d95d5e398baad956225cc4ba339d5b037 (patch) | |
| tree | 1823be59422dc3e0beb9240dd2bd0544a76253f2 /lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h | |
| parent | 63335afb4ebaabc1f983b1f1dbb07816ef4f288f (diff) | |
| download | llvm-4658366d95d5e398baad956225cc4ba339d5b037.zip llvm-4658366d95d5e398baad956225cc4ba339d5b037.tar.gz llvm-4658366d95d5e398baad956225cc4ba339d5b037.tar.bz2 | |
[ARM64EC 3/?] Mark reserved registers specific to ARM64EC ABI.
Part of patchset to add initial support for ARM64EC.
I'm not completely sure I understand the reason for this restriction,
but Microsoft documentation says that asynchronous signals clobber these
registers, so we can't ever use them.
As far as I know, none of these registers have any hardcoded meaning, so
reserving them shouldn't have any significant side-effects.
Differental Revision: https://reviews.llvm.org/D125413
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/SWIGPythonBridge.h')
0 files changed, 0 insertions, 0 deletions