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| author | Austin Kerbow <Austin.Kerbow@amd.com> | 2022-07-19 22:55:42 -0700 |
|---|---|---|
| committer | Austin Kerbow <Austin.Kerbow@amd.com> | 2022-07-27 22:34:37 -0700 |
| commit | ba0d079c7aa52bc0ae860d16dd4a33b0dc5cfff7 (patch) | |
| tree | 7c2a51c83c5e7c1545065ab6d874f05117d6e9ac /lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h | |
| parent | 93e3aeb9a84f489d632a6d494813ed4fe2cb6865 (diff) | |
| download | llvm-ba0d079c7aa52bc0ae860d16dd4a33b0dc5cfff7.zip llvm-ba0d079c7aa52bc0ae860d16dd4a33b0dc5cfff7.tar.gz llvm-ba0d079c7aa52bc0ae860d16dd4a33b0dc5cfff7.tar.bz2 | |
[AMDGPU] Aggressively schedule to reduce RP in occupancy limited regions
By not clustering loads and adjusting heuristics to more aggressively reduce
register pressure we may be able to increase occupancy for the function if it
was dropped in a first pass scheduling.
Similarly, try to reduce spilling if register usage exceeds lower bound
occupancy.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D130329
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h')
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