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author | Craig Topper <craig.topper@sifive.com> | 2024-02-12 21:43:35 -0800 |
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committer | Craig Topper <craig.topper@sifive.com> | 2024-02-13 09:57:48 -0800 |
commit | 7d40ea85d5ea5cc837536f61e3b4f80ea69f14d0 (patch) | |
tree | d55cc0c08e572175c25da9206fe35702d0b037f6 /lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h | |
parent | 9838c8512bc29e3a1b8edeb0eb2541160e4c727f (diff) | |
download | llvm-7d40ea85d5ea5cc837536f61e3b4f80ea69f14d0.zip llvm-7d40ea85d5ea5cc837536f61e3b4f80ea69f14d0.tar.gz llvm-7d40ea85d5ea5cc837536f61e3b4f80ea69f14d0.tar.bz2 |
[RISCV] Enable the TypePromotion pass from AArch64/ARM.
This pass looks for unsigned icmps that have illegal types and tries
to widen the use/def graph to improve the placement of the zero
extends that type legalization would need to insert.
I've explicitly disabled it for i32 by adding a check for
isSExtCheaperThanZExt to the pass.
The generated code isn't perfect, but my data shows a net
dynamic instruction count improvement on spec2017 for both base and
Zba+Zbb+Zbs.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.h')
0 files changed, 0 insertions, 0 deletions