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| author | Justin Hibbits <jrh29@alumni.cwru.edu> | 2020-03-23 09:44:39 -0500 |
|---|---|---|
| committer | Justin Hibbits <jrh29@alumni.cwru.edu> | 2020-03-23 17:15:27 -0500 |
| commit | f0990e104b0858fbdc4c726cd8da1ff166fe2dca (patch) | |
| tree | 7f80f647a1bada209919646cf19ec0c4a4aadf2f /lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp | |
| parent | 502915c619a32972ddc525be585794371bfbd27b (diff) | |
| download | llvm-f0990e104b0858fbdc4c726cd8da1ff166fe2dca.zip llvm-f0990e104b0858fbdc4c726cd8da1ff166fe2dca.tar.gz llvm-f0990e104b0858fbdc4c726cd8da1ff166fe2dca.tar.bz2 | |
[PowerPC]: e500 target can't use lwsync, use msync instead
The e500 core has a silicon bug that triggers an illegal instruction
program trap on any sync other than msync. Other cores will typically
ignore illegal sync types, and the documentation even implies that the
'illegal' bits are ignored.
Address this hardware deficiency by only using msync, like the PPC440.
Differential Revision: https://reviews.llvm.org/D76614
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp')
0 files changed, 0 insertions, 0 deletions