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| author | Jay Foad <jay.foad@amd.com> | 2023-09-13 20:22:45 +0100 |
|---|---|---|
| committer | Jay Foad <jay.foad@amd.com> | 2023-09-19 11:18:12 +0100 |
| commit | e0919b189bf2df4f97f22ba40260ab5153988b14 (patch) | |
| tree | 72e6997b19517339d103712baf24717b5a6e25f1 /lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp | |
| parent | 1d305f95d60e04790f08b10261fff537311c191d (diff) | |
| download | llvm-e0919b189bf2df4f97f22ba40260ab5153988b14.zip llvm-e0919b189bf2df4f97f22ba40260ab5153988b14.tar.gz llvm-e0919b189bf2df4f97f22ba40260ab5153988b14.tar.bz2 | |
[CodeGen] Renumber slot indexes before register allocation (#66334)
RegAllocGreedy uses SlotIndexes::getApproxInstrDistance to approximate
the length of a live range for its heuristics. Renumbering all slot
indexes with the default instruction distance ensures that this estimate
will be as accurate as possible, and will not depend on the history of
how instructions have been added to and removed from SlotIndexes's maps.
This also means that enabling -early-live-intervals, which runs the
SlotIndexes analysis earlier, will not cause large amounts of churn due
to different register allocator decisions.
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp')
0 files changed, 0 insertions, 0 deletions