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authorPhilip Reames <preames@rivosinc.com>2022-07-28 08:22:36 -0700
committerPhilip Reames <listmail@philipreames.com>2022-07-28 08:55:52 -0700
commit82c1b136dbe10760241fabf13c635f78a509e744 (patch)
tree5b912cc394653b2c08a908e4d32512de69c0a6a0 /lldb/source/Plugins/ScriptInterpreter/Python/PythonReadline.cpp
parentc214cb6a689581c1b7f3b702b5da6d68de6eaf3f (diff)
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[LV] Don't predicate uniform mem op stores unneccessarily
We already had the reasoning about uniform mem op loads; if the address is accessed at least once, we know the instruction doesn't need predicated to ensure fault safety. For stores, we do need to ensure that the values visible in memory are the same with and without predication. The easiest sub-case to check for is that all the values being stored are the same. Since we know that at least one lane is active, this tells us that the value must be visible. Warning on confusing terminology: "uniform" vs "uniform mem op" mean two different things here, and this patch is specific to the later. It would *not* be legal to make this same change for merely "uniform" operations. Differential Revision: https://reviews.llvm.org/D130637
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