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| author | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2019-10-24 10:03:36 +0200 |
|---|---|---|
| committer | Petar Avramovic <Petar.Avramovic@rt-rk.com> | 2019-10-24 10:03:36 +0200 |
| commit | 1d7f79c0171df921e5519c7f19a94d9a53c7d248 (patch) | |
| tree | 4d73c2bd20cd45b6144b516026415afbc9ef7888 /lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h | |
| parent | 7f1ffef567a749e7a3e369239f34a3f2a4887e63 (diff) | |
| download | llvm-1d7f79c0171df921e5519c7f19a94d9a53c7d248.zip llvm-1d7f79c0171df921e5519c7f19a94d9a53c7d248.tar.gz llvm-1d7f79c0171df921e5519c7f19a94d9a53c7d248.tar.bz2 | |
[MIPS GlobalISel] MSA vector generic and builtin sdiv, srem, udiv, urem
Select vector G_SDIV, G_SREM, G_UDIV and G_UREM for MIPS32 with MSA. We
have to set bank for vector operands to fprb and selectImpl will do the
rest. __builtin_msa_div_s_<format>, __builtin_msa_mod_s_<format>,
__builtin_msa_div_u_<format> and __builtin_msa_mod_u_<format> will be
transformed into G_SDIV, G_SREM, G_UDIV and G_UREM in legalizeIntrinsic
respectively and selected in the same way.
Differential Revision: https://reviews.llvm.org/D69333
Diffstat (limited to 'lldb/source/Plugins/ScriptInterpreter/Python/PythonDataObjects.h')
0 files changed, 0 insertions, 0 deletions