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author | Nitin John Raj <nitin.raj@sifive.com> | 2023-08-07 14:30:11 -0700 |
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committer | Nitin John Raj <nitin.raj@sifive.com> | 2023-08-07 15:11:34 -0700 |
commit | 649e1d1b9de9d03918691e8dd3700f8d077d3498 (patch) | |
tree | 13864c638a304b2f1ef2f499cb7eee0aa4ecfbb3 /lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp | |
parent | f0a3954ef1af274cb0b79a6e0bc51a31e0de540b (diff) | |
download | llvm-649e1d1b9de9d03918691e8dd3700f8d077d3498.zip llvm-649e1d1b9de9d03918691e8dd3700f8d077d3498.tar.gz llvm-649e1d1b9de9d03918691e8dd3700f8d077d3498.tar.bz2 |
[RISCV][GlobalISel] Legalize bitshift instructions for narrow types
Legalize G_SHL, G_ASHR and G_LSHR for types narrower and upto (and including) XLen: (i7, i8,
i16 and i32) for rv32 and (i8, i15, i16, i32 and i64) for rv64. This requires
adding some rules to handle G_ANYEXT, G_ZEXT and G_SEXT.
Reviewed By: craig.topper
Differential Revision: https://reviews.llvm.org/D155772
Diffstat (limited to 'lldb/source/Plugins/Process/gdb-remote/ProcessGDBRemote.cpp')
0 files changed, 0 insertions, 0 deletions