diff options
| author | Samuel Antao <sfantao@us.ibm.com> | 2015-03-17 15:00:57 +0000 |
|---|---|---|
| committer | Samuel Antao <sfantao@us.ibm.com> | 2015-03-17 15:00:57 +0000 |
| commit | f68156015dd0596ffc94385c163ee4d32efb15f2 (patch) | |
| tree | 766a4303d1934ef02efa48b83da51b661390faef /lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp | |
| parent | c0eb4de58d766de2ca759943f8d080aa1ae32dcb (diff) | |
| download | llvm-f68156015dd0596ffc94385c163ee4d32efb15f2.zip llvm-f68156015dd0596ffc94385c163ee4d32efb15f2.tar.gz llvm-f68156015dd0596ffc94385c163ee4d32efb15f2.tar.bz2 | |
Fix R0 use in PowerPC VSX store for FastIsel.
The VSX stores are sometimes generated with a undefined index register, causing %noreg to be used and R0 to be emitted later on. The semantics of the VSX store (e.g. stdsdx) requires R0 to be used as base if we want zero to be used in the computation of the effective address instead of the content of R0. This patch checks if no index register was generated and forces R0 to be used as base address.
llvm-svn: 232486
Diffstat (limited to 'lldb/source/Plugins/Process/gdb-remote/GDBRemoteCommunicationServerLLGS.cpp')
0 files changed, 0 insertions, 0 deletions