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| author | Mikhail Maltsev <mikhail.maltsev@arm.com> | 2020-02-17 15:37:49 +0000 |
|---|---|---|
| committer | Mikhail Maltsev <mikhail.maltsev@arm.com> | 2020-02-17 15:39:16 +0000 |
| commit | dd4d09376209cdc5615097a5be92105f55d06f5d (patch) | |
| tree | 488116705450a0d7b33aa8cad0251099920344a7 /lldb/source/Plugins/ObjectFile/JIT/ObjectFileJIT.cpp | |
| parent | 5fdc9851d06f46ed07cb4db2f29bca502211d127 (diff) | |
| download | llvm-dd4d09376209cdc5615097a5be92105f55d06f5d.zip llvm-dd4d09376209cdc5615097a5be92105f55d06f5d.tar.gz llvm-dd4d09376209cdc5615097a5be92105f55d06f5d.tar.bz2 | |
[ARM] Add initial support for Custom Datapath Extension (CDE)
Summary:
This patch adds assembly-level support for a new Arm M-profile
architecture extension, Custom Datapath Extension (CDE).
A brief description of the extension is available at
https://developer.arm.com/architectures/instruction-sets/custom-instructions
The latest specification for CDE is currently a beta release and is
available at
https://static.docs.arm.com/ddi0607/aa/DDI0607A_a_armv8m_arm_supplement_cde.pdf
CDE allows chip vendors to add custom CPU instructions. The CDE
instructions re-use the same encoding space as existing coprocessor
instructions (such as MRC, MCR, CDP etc.). Each coprocessor in range
cp0-cp7 can be configured as either general purpose (GCP) or custom
datapath (CDEv1). This configuration is defined by the CPU vendor and
is provided to LLVM using 8 subtarget features: cdecp0 ... cdecp7.
The semantics of CDE instructions are implementation-defined, but the
instructions are guaranteed to be pure (that is, they are stateless,
they do not access memory or any registers except their explicit
inputs/outputs).
CDE requires the CPU to support at least Armv8.0-M mainline
architecture. CDE includes 3 sets of instructions:
* Instructions that operate on general purpose registers and NZCV
flags
* Instructions that operate on the S or D register file (require
either FP or MVE extension)
* Instructions that operate on the Q register file, require MVE
The user-facing names that can be specified on the command line are
the same as the 8 subtarget feature names. For example:
$ clang -target arm-none-none-eabi -march=armv8m.main+cdecp0+cdecp3
tells the compiler that the coprocessors 0 and 3 are configured as
CDEv1 and the remaining coprocessors are configured as GCP (which is
the default).
Reviewers: simon_tatham, ostannard, dmgreen, eli.friedman
Reviewed By: simon_tatham
Subscribers: kristof.beyls, hiraditya, cfe-commits, llvm-commits
Tags: #clang, #llvm
Differential Revision: https://reviews.llvm.org/D74044
Diffstat (limited to 'lldb/source/Plugins/ObjectFile/JIT/ObjectFileJIT.cpp')
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