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author | Ricardo Jesus <rjj@nvidia.com> | 2025-06-09 08:27:58 +0100 |
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committer | GitHub <noreply@github.com> | 2025-06-09 08:27:58 +0100 |
commit | c70c0a86a5b7b4c51d3be5ebbcc5cf291af4d843 (patch) | |
tree | 266a7130ed4255feec0e80724e455924e3bb956a /lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp | |
parent | acd264d0ace52c7fd4d10a20bd20a739040058c7 (diff) | |
download | llvm-c70c0a86a5b7b4c51d3be5ebbcc5cf291af4d843.zip llvm-c70c0a86a5b7b4c51d3be5ebbcc5cf291af4d843.tar.gz llvm-c70c0a86a5b7b4c51d3be5ebbcc5cf291af4d843.tar.bz2 |
[AArch64][InstCombine] Combine AES instructions with zero operands. (#142781)
We currently combine (AES (EOR (A, B)), 0) into (AES A, B) for Neon
intrinsics when the zero operand appears in the RHS of the AES
instruction.
This patch extends the combine to support AES SVE intrinsics and
the case where the zero operand appears in the LHS of the AES
instructions.
Diffstat (limited to 'lldb/source/Plugins/ObjectFile/ELF/ObjectFileELF.cpp')
0 files changed, 0 insertions, 0 deletions