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| author | Craig Topper <craig.topper@sifive.com> | 2023-06-13 09:52:26 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2023-06-13 10:39:43 -0700 |
| commit | 2f2af2d01763374ed55f5fb598e5005c1b9af957 (patch) | |
| tree | cba160b1c3a7af887f4df7664dd14085c8ba937b /lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp | |
| parent | 335c0f775d96536b94dd4703362b5386d056aa6d (diff) | |
| download | llvm-2f2af2d01763374ed55f5fb598e5005c1b9af957.zip llvm-2f2af2d01763374ed55f5fb598e5005c1b9af957.tar.gz llvm-2f2af2d01763374ed55f5fb598e5005c1b9af957.tar.bz2 | |
[RISCV] Change the immediate argument to Zk* intrinsics/builtins from i8 to i32.
This matches gcc. It also lets us fix a bug that the byteselect
predicate was not being evaluated in tablegen. We can't have i8
TImmLeaf in tablegen because i8 isn't a type for any register class.
I've added AutoUpgrade support for the IR intrinsics.
Reviewed By: asb
Differential Revision: https://reviews.llvm.org/D152627
Diffstat (limited to 'lldb/source/Plugins/Language/CPlusPlus/LibStdcpp.cpp')
0 files changed, 0 insertions, 0 deletions