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| author | Aiden Grossman <aidengrossman@google.com> | 2024-11-10 23:38:55 -0800 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-11-10 23:38:55 -0800 |
| commit | 01a5596b5295d1585716d2deade407adaa40fe20 (patch) | |
| tree | b5e475542fec4e3c20ad13e1abedda17a52c2dab /lldb/source/Interpreter/CommandInterpreter.cpp | |
| parent | b7db403e701029c801fd990dceeb219de9fb800c (diff) | |
| download | llvm-01a5596b5295d1585716d2deade407adaa40fe20.zip llvm-01a5596b5295d1585716d2deade407adaa40fe20.tar.gz llvm-01a5596b5295d1585716d2deade407adaa40fe20.tar.bz2 | |
[llvm-exegesis][X86] Groups ports 2,3, and 11 for Golden Cove (#115645)
This patch updates the PFM counter mappings for Sapphire Rapids and
Alder Lake (p-cores) to group ports 2,3, and 11 despite the naming of
the performance counters. This is how the scheduling models assume
things work within LLVM, and seems to be a mistake within the Intel
perfmon documentation.
Fixes #113941.
Diffstat (limited to 'lldb/source/Interpreter/CommandInterpreter.cpp')
0 files changed, 0 insertions, 0 deletions