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author | Pavel Labath <pavel@labath.sk> | 2018-09-05 18:08:56 +0000 |
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committer | Pavel Labath <pavel@labath.sk> | 2018-09-05 18:08:56 +0000 |
commit | ef1b1b5d1715acf2f5f4b483dcffec4221292d87 (patch) | |
tree | 57c0728f5939b408ff4a52a642940b1543980392 /lldb/source/Host/common/NativeProcessProtocol.cpp | |
parent | 13b55bbc2f446b6ff3fae5288c1a0c700d3dc846 (diff) | |
download | llvm-ef1b1b5d1715acf2f5f4b483dcffec4221292d87.zip llvm-ef1b1b5d1715acf2f5f4b483dcffec4221292d87.tar.gz llvm-ef1b1b5d1715acf2f5f4b483dcffec4221292d87.tar.bz2 |
Modernize NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode
return the opcode as a Expected<ArrayRef> instead of a
Status+pointer+size combo.
I also move the linux implementation to the base class, as the trap
opcodes are likely to be the same for all/most implementations of the
class (except the arm one, where linux chooses a different opcode than
what the arm spec recommends, which I keep linux-specific).
llvm-svn: 341487
Diffstat (limited to 'lldb/source/Host/common/NativeProcessProtocol.cpp')
-rw-r--r-- | lldb/source/Host/common/NativeProcessProtocol.cpp | 32 |
1 files changed, 32 insertions, 0 deletions
diff --git a/lldb/source/Host/common/NativeProcessProtocol.cpp b/lldb/source/Host/common/NativeProcessProtocol.cpp index 7ccf8461..073257c 100644 --- a/lldb/source/Host/common/NativeProcessProtocol.cpp +++ b/lldb/source/Host/common/NativeProcessProtocol.cpp @@ -372,6 +372,38 @@ Status NativeProcessProtocol::SetSoftwareBreakpoint(lldb::addr_t addr, }); } +llvm::Expected<llvm::ArrayRef<uint8_t>> +NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_t size_hint) { + using ArrayRef = llvm::ArrayRef<uint8_t>; + + switch (GetArchitecture().GetMachine()) { + case llvm::Triple::aarch64: + return ArrayRef{0x00, 0x00, 0x20, 0xd4}; + + case llvm::Triple::x86: + case llvm::Triple::x86_64: + return ArrayRef{0xcc}; + + case llvm::Triple::mips: + case llvm::Triple::mips64: + return ArrayRef{0x00, 0x00, 0x00, 0x0d}; + + case llvm::Triple::mipsel: + case llvm::Triple::mips64el: + return ArrayRef{0x0d, 0x00, 0x00, 0x00}; + + case llvm::Triple::systemz: + return ArrayRef{0x00, 0x01}; + + case llvm::Triple::ppc64le: + return ArrayRef{0x08, 0x00, 0xe0, 0x7f}; // trap + + default: + return llvm::createStringError(llvm::inconvertibleErrorCode(), + "CPU type not supported!"); + } +} + Status NativeProcessProtocol::RemoveBreakpoint(lldb::addr_t addr, bool hardware) { if (hardware) |