diff options
author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-06-25 11:39:59 -0400 |
---|---|---|
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2022-06-29 11:19:15 -0400 |
commit | da6d7728d489c6b8bc4cf1cde70100867cf693bc (patch) | |
tree | 4374b924a71484a18f741c28d7227bbb508d0f61 /lldb/source/Commands/CommandObjectThread.cpp | |
parent | 3ea812bb1b868d86782db5b5c353b1df7b298b44 (diff) | |
download | llvm-da6d7728d489c6b8bc4cf1cde70100867cf693bc.zip llvm-da6d7728d489c6b8bc4cf1cde70100867cf693bc.tar.gz llvm-da6d7728d489c6b8bc4cf1cde70100867cf693bc.tar.bz2 |
AMDGPU: Mark more instructions as rematerializable
D106023 excluded 16-bit instructions from rematerialization, with the
justification that we can't rematerialize instructions that preserve
the high bits (plus the instructions which do are a confusing mess
between different subtargets). This doesn't make sense to me as a
problem since cases where we would rely on the high bit behavior would
still need to be represented as a register value constraint with a
tied operand. It's not a hidden side effect and should still be
rematerializable.
Diffstat (limited to 'lldb/source/Commands/CommandObjectThread.cpp')
0 files changed, 0 insertions, 0 deletions