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| author | Sam Parker <sam.parker@arm.com> | 2017-09-18 14:46:14 +0000 |
|---|---|---|
| committer | Sam Parker <sam.parker@arm.com> | 2017-09-18 14:46:14 +0000 |
| commit | 3fa0ccffc648184b89b05222b1666ce965fad691 (patch) | |
| tree | 3dc6039d4f824fb696f805fee632e0b2f0a5a3a1 /lldb/source/Commands/CommandObjectThread.cpp | |
| parent | 6c865eab372b25b794ce1ed8e9d9fa209c7d8776 (diff) | |
| download | llvm-3fa0ccffc648184b89b05222b1666ce965fad691.zip llvm-3fa0ccffc648184b89b05222b1666ce965fad691.tar.gz llvm-3fa0ccffc648184b89b05222b1666ce965fad691.tar.bz2 | |
[AArch64] Add V8_2aOps feature to Cortex-A55 and 75
Add the missing hardware features the ProcA55 and ProcA75 feature.
These are already enabled via the target parser, but I had missed
them in the backend.
Differential Revision: https://reviews.llvm.org/D37974
llvm-svn: 313535
Diffstat (limited to 'lldb/source/Commands/CommandObjectThread.cpp')
0 files changed, 0 insertions, 0 deletions