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| author | Austin Kerbow <Austin.Kerbow@amd.com> | 2019-11-22 12:25:13 -0800 |
|---|---|---|
| committer | Austin Kerbow <Austin.Kerbow@amd.com> | 2019-11-28 10:13:48 -0800 |
| commit | 256ad954a9e453e55b950207ca433da8da883a33 (patch) | |
| tree | 6b64e37e8b3350063cebb26554e11dce42e7165e /lldb/source/Commands/CommandObjectThread.cpp | |
| parent | acd7fe8636ab1d892a935ca747ed9bb6420e2253 (diff) | |
| download | llvm-256ad954a9e453e55b950207ca433da8da883a33.zip llvm-256ad954a9e453e55b950207ca433da8da883a33.tar.gz llvm-256ad954a9e453e55b950207ca433da8da883a33.tar.bz2 | |
AMDGPU: Reuse carry out register during FI elimination
Summary:
Pre gfx9 we need to scavenge a 64-bit SGPR to use as the carry out for an Add.
If only one SGPR was available this crashed when trying to scavenge another
32bit SGPR to materialize the offset.
Instead, reuse a 32-bit SGPR from the carry out as the offset register.
Also prefer to use vcc for the unused carry out when it is available.
Reviewers: arsenm, rampitec
Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D70614
Diffstat (limited to 'lldb/source/Commands/CommandObjectThread.cpp')
0 files changed, 0 insertions, 0 deletions