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| author | Sjoerd Meijer <smeijer@nvidia.com> | 2023-02-09 16:07:17 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <smeijer@nvidia.com> | 2023-02-09 16:28:11 +0000 |
| commit | 079c488c66056f7bf22c30ee280489f6c43b7658 (patch) | |
| tree | 52f835ea8daaaa59691031adbb6428ae58baeeeb /lldb/source/Commands/CommandObjectLog.cpp | |
| parent | ec094d259ecfdd82b951f644bc9a28e487e53c60 (diff) | |
| download | llvm-079c488c66056f7bf22c30ee280489f6c43b7658.zip llvm-079c488c66056f7bf22c30ee280489f6c43b7658.tar.gz llvm-079c488c66056f7bf22c30ee280489f6c43b7658.tar.bz2 | |
[TTI][AArch64] Cost model insertelement and indexed LD1 instructions
An indexed LD1 instruction, or "ASIMD load, 1 element, one lane, B/H/S"
instruction that loads a value and inserts an element into a vector is
an expensive instruction. It has a latency of 8 on modern cores. We
generate an indexed LD1 when an insertelement instruction has a load as an
operand and this patch is recognising and makes indexed LD1 more expensive.
Differential Revision: https://reviews.llvm.org/D141602
Diffstat (limited to 'lldb/source/Commands/CommandObjectLog.cpp')
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