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| author | Joe Nash <Joseph.Nash@amd.com> | 2022-02-14 13:34:11 -0500 |
|---|---|---|
| committer | Joe Nash <Joseph.Nash@amd.com> | 2022-02-14 15:16:21 -0500 |
| commit | c87c61c52cad32576597fb6de764863f21b2ee7e (patch) | |
| tree | 70f043aa72284217decd50491f2598709fd2db3b /lldb/source/Commands/CommandObjectCommands.cpp | |
| parent | 8c060613721c5e7b52f43e7d1da24346b0506dde (diff) | |
| download | llvm-c87c61c52cad32576597fb6de764863f21b2ee7e.zip llvm-c87c61c52cad32576597fb6de764863f21b2ee7e.tar.gz llvm-c87c61c52cad32576597fb6de764863f21b2ee7e.tar.bz2 | |
[AMDGPU] Fix AGPR offset for waitcnt
An enum value stores the offset between AGPR ranges and VGPR
ranges in the internal storage of SIInsertWaitcnts. It said 226 when
it should say 256, causing some portion of the ranges to overlap. That
in turn causes 'aliasing' between the registers, potentially inserting
waitcnts that are not required.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D119749
Diffstat (limited to 'lldb/source/Commands/CommandObjectCommands.cpp')
0 files changed, 0 insertions, 0 deletions