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| author | Joe Nash <Joseph.Nash@amd.com> | 2022-02-14 11:29:58 -0500 |
|---|---|---|
| committer | Joe Nash <Joseph.Nash@amd.com> | 2022-02-14 14:45:14 -0500 |
| commit | aabf6e65fde796fe936988e2f86aec791188954a (patch) | |
| tree | 741b8901a8f942af926ce7399197f9dbdca3e41f /lldb/source/Commands/CommandObjectCommands.cpp | |
| parent | 4aaa8e4e0034184238eb8e94452dd9cf09f9215a (diff) | |
| download | llvm-aabf6e65fde796fe936988e2f86aec791188954a.zip llvm-aabf6e65fde796fe936988e2f86aec791188954a.tar.gz llvm-aabf6e65fde796fe936988e2f86aec791188954a.tar.bz2 | |
[AMDGPU] Pre-commit test for wait between agpr & vgpr
Due to a typo of 256 to 226, the SIInsertWaitcnt pass thinks
several registers are aliased from a waitcnt PoV including vgpr226
and agpr0, vgpr227 and agpr1...
This is a test of the behavior.
NFC.
Reviewed By: rampitec
Differential Revision: https://reviews.llvm.org/D119750
Diffstat (limited to 'lldb/source/Commands/CommandObjectCommands.cpp')
0 files changed, 0 insertions, 0 deletions