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authorArnaud A. de Grandmaison <arnaud.degrandmaison@arm.com>2014-07-10 15:12:26 +0000
committerArnaud A. de Grandmaison <arnaud.degrandmaison@arm.com>2014-07-10 15:12:26 +0000
commitf643231163d2e897139b7dc1e1b53da4242b32b2 (patch)
treea964f80e0036b3024a1559c1e7c1830c515846e4 /lldb/scripts/Python/finishSwigPythonLLDB.py
parent350b78e5ea707ab8c4aaf430d70df1a495c2d1de (diff)
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[AArch64] Add logical alias instructions to MC AsmParser
This patch teaches the AsmParser to accept some logical+immediate instructions and convert them as shown: bic Rd, Rn, #imm -> and Rd, Rn, #~imm bics Rd, Rn, #imm -> ands Rd, Rn, #~imm orn Rd, Rn, #imm -> orr Rd, Rn, #~imm eon Rd, Rn, #imm -> eor Rd, Rn, #~imm Those instructions are an alternate syntax available to assembly coders, and are needed in order to support code already compiling with some other assemblers. For example, the bic construct is used by the linux kernel. llvm-svn: 212722
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