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author | Craig Topper <craig.topper@sifive.com> | 2024-09-11 21:13:26 -0700 |
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committer | GitHub <noreply@github.com> | 2024-09-11 21:13:26 -0700 |
commit | 8c17ed1512239a5a9b1320f678a8cd89db8b0981 (patch) | |
tree | b4f3e1e09ca7e4b87ce32889d6b30c6a4802874f /lldb/packages/Python/lldbsuite/test | |
parent | 08740a6157375c4173023f28fc9e90689afee5ba (diff) | |
download | llvm-8c17ed1512239a5a9b1320f678a8cd89db8b0981.zip llvm-8c17ed1512239a5a9b1320f678a8cd89db8b0981.tar.gz llvm-8c17ed1512239a5a9b1320f678a8cd89db8b0981.tar.bz2 |
[RISCV] Generalize RISCVDAGToDAGISel::selectFPImm to handle bitcasts from int to FP. (#108284)
selectFPImm previously handled cases where an FPImm could be
materialized in an integer register.
We can generalize this to cases where a value was in an integer register
and then copied to a scalar FP register to be used by a vector
instruction.
In the affected test, the call lowering code used up all of the FP
argument registers and started using GPRs. Now we use integer vector
instructions to consume those GPRs instead of moving them to scalar FP
first.
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test')
0 files changed, 0 insertions, 0 deletions