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authorLou <lou.knauer@sipearl.com>2025-01-30 11:49:42 +0100
committerGitHub <noreply@github.com>2025-01-30 11:49:42 +0100
commitc75b251103a6acd785e6f43f640d7a08bd259c41 (patch)
tree7977dd45f6160095da07e9b01883f2405867341d /lldb/packages/Python/lldbsuite/test/gdbclientutils.py
parent3262863805d8a1de3e5c104d9daab82bf4a6d8d1 (diff)
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[GVN] Load-store forwaring of scalable store to fixed load. (#124748)
When storing a scalable vector and loading a fixed-size vector, where the scalable vector is known to be larger based on vscale_range, perform store-to-load forwarding through temporary @llvm.vector.extract calls. InstCombine then folds the insert/extract pair away. The usecase is shown in https://godbolt.org/z/KT3sMrMbd, which shows that clang generates IR that matches this pattern when the "arm_sve_vector_bits" attribute is used: ```c typedef svfloat32_t svfloat32_fixed_t __attribute__((arm_sve_vector_bits(512))); struct svfloat32_wrapped_t { svfloat32_fixed_t v; }; static inline svfloat32_wrapped_t add(svfloat32_wrapped_t a, svfloat32_wrapped_t b) { return {svadd_f32_x(svptrue_b32(), a.v, b.v)}; } svfloat32_wrapped_t foo(svfloat32_wrapped_t a, svfloat32_wrapped_t b) { // The IR pattern this patch matches is generated for this return: return add(a, b); } ```
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