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| author | Craig Topper <craig.topper@sifive.com> | 2021-04-23 16:18:50 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2021-04-23 16:56:46 -0700 |
| commit | bd28d8611905f5b19dabf5a52269190b2f7195b4 (patch) | |
| tree | 29f87be568a02510f9d71dbc30086d0cf7be8c9f /lldb/packages/Python/lldbsuite/test/configuration.py | |
| parent | 59f2dd5f1acded46299cc8eee61a3af78036e140 (diff) | |
| download | llvm-bd28d8611905f5b19dabf5a52269190b2f7195b4.zip llvm-bd28d8611905f5b19dabf5a52269190b2f7195b4.tar.gz llvm-bd28d8611905f5b19dabf5a52269190b2f7195b4.tar.bz2 | |
[RISCV] Removed getLMULForFixedLengthVector.
Use getContainerForFixedLengthVector and getRegClassIDForVecVT to
get the register class to use when making a fixed vector type legal.
Inline it into the other two call sites.
I'm looking into using fractional lmul for fixed length vectors
and getLMULForFixedLengthVector returned an integer making it
unable to express this. I considered returning the LMUL
enum, but that seemed like it would introduce more complexity to
convert it for use.
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/configuration.py')
0 files changed, 0 insertions, 0 deletions