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author | Jay Foad <jay.foad@amd.com> | 2024-10-30 16:12:37 +0000 |
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committer | GitHub <noreply@github.com> | 2024-10-30 16:12:37 +0000 |
commit | 8ee5e19c879ee2d467aa0f1eb8f1d8ed34321496 (patch) | |
tree | 313160c8e66c5167204d70a26f9106e8ea73ccda /lldb/packages/Python/lldbsuite/test/configuration.py | |
parent | 4b028773b2c977eb8494a39e4b3fb2f114d1e2b5 (diff) | |
download | llvm-8ee5e19c879ee2d467aa0f1eb8f1d8ed34321496.zip llvm-8ee5e19c879ee2d467aa0f1eb8f1d8ed34321496.tar.gz llvm-8ee5e19c879ee2d467aa0f1eb8f1d8ed34321496.tar.bz2 |
[AMDGPU] Fix @llvm.amdgcn.cs.chain with SGPR args not provably uniform (#114232)
The correct behaviour is to insert a readfirstlane. SelectionDAG was
already doing this in some cases, but not in the general case for chain
calls. GlobalISel was already doing this for return values but not for
arguments.
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/configuration.py')
0 files changed, 0 insertions, 0 deletions