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| author | Lei Huang <lei@ca.ibm.com> | 2025-09-24 10:20:49 -0400 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-09-24 10:20:49 -0400 |
| commit | 88c988ed4ccdd43f25293b48cbfd9b30e0c79b6a (patch) | |
| tree | 2fb2f45be4a1257db44d6026df708447b53c52b3 /lldb/packages/Python/lldbsuite/test/configuration.py | |
| parent | 40aac77b7bdddf78391ce229f7e327fbec88b42f (diff) | |
| download | llvm-88c988ed4ccdd43f25293b48cbfd9b30e0c79b6a.zip llvm-88c988ed4ccdd43f25293b48cbfd9b30e0c79b6a.tar.gz llvm-88c988ed4ccdd43f25293b48cbfd9b30e0c79b6a.tar.bz2 | |
[PowerPC] Implement VSX Vector Integer Arithmetic Instructions (#158363)
New instructions added:
* xvadduwm - VSX Vector Add UnsignedWord Modulo
* xvadduhm - VSXVectorAddUnsigned HalfwordModulo
* xvsubuwm - VSXVectorSubtract UnsignedWord Modulo
* xvsubuhm - VSX Vector SubtractUnsigned HalfwordModulo
* xvmuluwm - VSX Vector MultiplyUnsigned WordModulo
* xvmuluhm - VSXVectorMultiply Unsigned Halfword Modulo
* xvmulhsw - VSX Vector MultiplyHigh SignedWord
* xvmulhsh - VSX Vector Multiply HighSigned Halfword
* xvmulhuw - VSX Vector Multiply HighUnsigned Word
* xvmulhuh - VSX Vector MultiplyHigh UnsignedHalfword
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/configuration.py')
0 files changed, 0 insertions, 0 deletions