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| author | Jay Foad <jay.foad@amd.com> | 2024-10-30 16:18:29 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-10-30 16:18:29 +0000 |
| commit | 6bf4476ffb6bab661d59dee361ab845b2f68d9b1 (patch) | |
| tree | d170a98a74bfc266ea28866208fa3a305ff7a41f /lldb/packages/Python/lldbsuite/test/configuration.py | |
| parent | 1ddea4fc13eb12ddb4e71f7675a496de6d517ec4 (diff) | |
| download | llvm-6bf4476ffb6bab661d59dee361ab845b2f68d9b1.zip llvm-6bf4476ffb6bab661d59dee361ab845b2f68d9b1.tar.gz llvm-6bf4476ffb6bab661d59dee361ab845b2f68d9b1.tar.bz2 | |
[AMDGPU] Fix @llvm.amdgcn.cs.chain with callee not provably uniform (#114200)
The correct behavior is to insert a readfirstlane. This worked except
for an inappropriate assertion in SITargetLowering::LowerCall.
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/configuration.py')
0 files changed, 0 insertions, 0 deletions