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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2025-06-25 10:48:51 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-06-25 10:48:51 +0100 |
| commit | 5d2ece14378ef00b569e5f29034a0236d735da44 (patch) | |
| tree | 0589897f777ceeb7628ce38aa7ff854e6cd4c3a7 /lldb/packages/Python/lldbsuite/test/configuration.py | |
| parent | 3a3d1bf4a39bbbe1cfdc56ab9eeeb13cb438348a (diff) | |
| download | llvm-5d2ece14378ef00b569e5f29034a0236d735da44.zip llvm-5d2ece14378ef00b569e5f29034a0236d735da44.tar.gz llvm-5d2ece14378ef00b569e5f29034a0236d735da44.tar.bz2 | |
[X86] Allow znver3/4/5 targets to use double-shift instructions by default (#132720)
While still not as fast as Intel targets, recent AMD znver3 + later CPUs
are not as microcoded+bottlenecked as previous AMD targets (now only
~2cy rthroughput) which improves on the expanded 3*shift+not+or sequence
we expand to as an alternative.
Noticed while triaging #132601
Diffstat (limited to 'lldb/packages/Python/lldbsuite/test/configuration.py')
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