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| author | Stefan Pintilie <stefanp@ca.ibm.com> | 2022-08-16 11:08:33 -0500 |
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| committer | Stefan Pintilie <stefanp@ca.ibm.com> | 2022-08-19 07:05:40 -0500 |
| commit | 1492c88f494cb09de0ebc7fb77a84c41d0aa93ce (patch) | |
| tree | 0a0dd9b55564d3f7043e48d3ea1b97457081e182 /libcxx/include/__algorithm | |
| parent | 9f21d6e953e559d695b1eb372976533eccba2b06 (diff) | |
| download | llvm-1492c88f494cb09de0ebc7fb77a84c41d0aa93ce.zip llvm-1492c88f494cb09de0ebc7fb77a84c41d0aa93ce.tar.gz llvm-1492c88f494cb09de0ebc7fb77a84c41d0aa93ce.tar.bz2 | |
[PowerPC] Fix bugs in sign-/zero-extension elimination
This patch fixes the following two bugs in `PPCInstrInfo::isSignOrZeroExtended` helper, which is used from sign-/zero-extension elimination in PPCMIPeephole pass.
- Registers defined by load with update (e.g. LBZU) were identified as already sign or zero-extended. But it is true only for the first def (loaded value) and not for the second def (i.e. updated pointer).
- Registers defined by ORIS/XORIS were identified as already sign-extended. But, it is not true for sign extension depending on the immediate (while it is ok for zero extension).
To handle the first case, the parameter for the helpers is changed from `MachineInstr` to a register number to distinguish first and second defs. Also, this patch moves the initialization of PPCMIPeepholePass to allow mir test case.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D40554
Diffstat (limited to 'libcxx/include/__algorithm')
0 files changed, 0 insertions, 0 deletions