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| author | Pierre van Houtryve <pierre.vanhoutryve@amd.com> | 2025-02-26 13:14:03 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2025-02-26 13:14:03 +0100 |
| commit | 5231736329224fa3f812c22e1e5250e776956550 (patch) | |
| tree | 38da9eef264d0df677b8aaece72a2586024e3fae /libcxx/include/__algorithm/generate.h | |
| parent | 5f4d1f74004d3e4699b5c8b05edd2050f8456ee8 (diff) | |
| download | llvm-5231736329224fa3f812c22e1e5250e776956550.zip llvm-5231736329224fa3f812c22e1e5250e776956550.tar.gz llvm-5231736329224fa3f812c22e1e5250e776956550.tar.bz2 | |
[AMDGPU] Do not allow M0 as v_readfirstlane_b32 dst (#128851)
M0 can only be written to by the SALU, so `v_readfirstlane_b32 m0` is
effectively useless. Represent this by restricting the dest RC of that
instruction to `SReg_32_XM0` which excludes M0.
There is a lot of test changes due to the register class changing, but
most changes are trivial. In some cases, an extra register and
`s_mov_b32` is needed.
Fixes SWDEV-513269
Diffstat (limited to 'libcxx/include/__algorithm/generate.h')
0 files changed, 0 insertions, 0 deletions