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| author | Alex MacLean <amaclean@nvidia.com> | 2024-09-12 08:37:45 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-12 08:37:45 -0700 |
| commit | e42f4734c61ac139eba6f880e204c5231b431b9b (patch) | |
| tree | dcd909e8ef8a1775e7904ac08962e31a99a443ae /flang/lib/Parser/preprocessor.cpp | |
| parent | 859b785bb6a1ee20ffca58102d877fc9a4a639e4 (diff) | |
| download | llvm-e42f4734c61ac139eba6f880e204c5231b431b9b.zip llvm-e42f4734c61ac139eba6f880e204c5231b431b9b.tar.gz llvm-e42f4734c61ac139eba6f880e204c5231b431b9b.tar.bz2 | |
Reland "[NVPTX] Support copysign PTX instruction" (#108125)
Lower `fcopysign` SDNodes into `copysign` PTX instructions where
possible. See [PTX ISA: 9.7.3.2. Floating Point Instructions: copysign]
(https://docs.nvidia.com/cuda/parallel-thread-execution/index.html#floating-point-instructions-copysign).
Copysign SDNodes with mismatched types are expanded as before, since the
PTX instruction requires the types to match.
Diffstat (limited to 'flang/lib/Parser/preprocessor.cpp')
0 files changed, 0 insertions, 0 deletions