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| author | Sebastian Neubauer <sebastian.neubauer@amd.com> | 2021-01-28 14:53:22 +0100 |
|---|---|---|
| committer | Sebastian Neubauer <sebastian.neubauer@amd.com> | 2021-02-02 10:15:09 +0100 |
| commit | fc22de82182e05794123be70df5dfe15600c02b4 (patch) | |
| tree | 8cb2cc0f4202152401352e7edeb535ed6c960c59 /flang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 09cd849fdef2b2d3de2d0b0a5c512100957e0ef6 (diff) | |
| download | llvm-fc22de82182e05794123be70df5dfe15600c02b4.zip llvm-fc22de82182e05794123be70df5dfe15600c02b4.tar.gz llvm-fc22de82182e05794123be70df5dfe15600c02b4.tar.bz2 | |
[AMDGPU] Clarify calling conv about inactive lanes
So far, it was not specified what happens with the VGPRs of inactive
lanes when functions are called. This patch explicitely mentions that
the VGPR values of inactive lanes need to be preserved for all
registers.
This describes the current behavior, as only active lanes of registers
are saved to scratch. Also, as the multi-lane nature of VGPRs is not
properly modeled, we cannot determine the live VGPRs from inactive lanes
at calls. So we cannot save them, even if we intended to do so.
Differential Revision: https://reviews.llvm.org/D95610
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions