[lldb][RISCV] Add RegisterContextPOSIXCore for RISC-V 64 (#93297)

The PR adds the support of CoreDump debugging for RISC-V 64. It
implements new `RegisterContextCorePOSIX_riscv64` class.

Also, the contribution fixes `GetRegisterCount()` ->
`GetRegisterSetCount()` misprint in
`RegisterContextPOSIX_riscv64::GetRegisterSetCount()` method, which
leaded to `set && "Register set should be valid."` assertion during
`register info aX` command call.

The patch was tested (on coredumps generated for simple Integer/FP
calculation code) for _cross x86_64 -> RISCV_ and _native RISCV_ LLDB
builds. There were performed basic LLDB functionality tests, such as:

 - CoreDump file load
 - Backtrace / frames
 - GP/FP registers read/info/list
 - Basic switch between threads
 - Disassembler code
 - Memory regions read / display

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