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authorLuke Lau <luke@igalia.com>2024-01-15 12:07:29 +0700
committerGitHub <noreply@github.com>2024-01-15 12:07:29 +0700
commitc07a1fe7b448a7af72b931440be02bd9d2551138 (patch)
tree06b6489b8bb7c300d314fac25b6542927e4763f9 /flang/lib/Frontend/CompilerInvocation.cpp
parent85071a3c74f531ade3709351638c1380c4503d2c (diff)
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[RISCV] Lower vfmv.s.f intrinsics to VFMV_S_F_VL first (#76699)
Currently vfmv.s.f intrinsics are directly selected to their pseudos via a tablegen pattern in RISCVInstrInfoVPseudos.td, whereas the other move instructions (vmv.s.x/vmv.v.x/vmv.v.f etc.) first get lowered to their corresponding VL SDNode, then get selected from a pattern in RISCVInstrInfoVVLPatterns.td This patch brings vfmv.s.f inline with the other move instructions. Split out from #71501, where we did this to preserve the behaviour of selecting vmv_s_x for VFMV_S_F_VL for small enough immediates.
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