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| author | Jianjian GUAN <jacquesguan@me.com> | 2023-06-27 17:28:47 +0800 |
|---|---|---|
| committer | Jianjian GUAN <jacquesguan@me.com> | 2023-08-23 16:49:20 +0800 |
| commit | 879e801a916627fab9a90e2b51c9917b629c3392 (patch) | |
| tree | 9b825b029b0bc66aacf54e578f6dbfa76912e44d /flang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 759903568ff5fb4e092df508fbbbcb48e2186aea (diff) | |
| download | llvm-879e801a916627fab9a90e2b51c9917b629c3392.zip llvm-879e801a916627fab9a90e2b51c9917b629c3392.tar.gz llvm-879e801a916627fab9a90e2b51c9917b629c3392.tar.bz2 | |
[RISCV] Apply promotion for f16 vector ops when only have zvfhmin
For most fp16 vector ops, we could promote it to fp32 vector when zvfhmin is enable but zvfh is not.
But for nxv32f16, we need to split it first since nxv32f32 is not a valid MVT.
Reviewed By: michaelmaitland
Differential Revision: https://reviews.llvm.org/D153848
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions