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authorLuke Lau <luke@igalia.com>2024-05-08 12:33:01 +0800
committerGitHub <noreply@github.com>2024-05-08 12:33:01 +0800
commit8296f061aafb844bf3b9b002b7791ade7a1d3006 (patch)
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[RISCV] Add invariants that registers always have definitions. NFC (#90587)
For vector merge operands, we check if it's a NoRegister beforehand so any other register type should have a definition. For VL operands, they don't get replaced with NoRegisters since they're scalar and should also always have a definition, even if it's an implicit_def. All the definitions at this stage should also be unique, this will change in #70549
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