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| author | YunQiang Su <yunqiang@isrc.iscas.ac.cn> | 2025-03-26 23:01:26 +0800 |
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| committer | GitHub <noreply@github.com> | 2025-03-26 23:01:26 +0800 |
| commit | 6dd14c881cd6dbe76a73b60ab7eabf95f92271c4 (patch) | |
| tree | 0ce29891300e81f5f2c2a9a922d331853884f510 /flang/lib/Frontend/CompilerInvocation.cpp | |
| parent | c3e08c8f07ded9ef0d1ad2f3fb04e98d839479b1 (diff) | |
| download | llvm-6dd14c881cd6dbe76a73b60ab7eabf95f92271c4.zip llvm-6dd14c881cd6dbe76a73b60ab7eabf95f92271c4.tar.gz llvm-6dd14c881cd6dbe76a73b60ab7eabf95f92271c4.tar.bz2 | |
MIPS: Implements MipsTTIImpl::isLSRCostLess using Insns as first (#133068)
So that LoopStrengthReduce can work for MIPS.
The code is copied from RISC-V.
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Co-authored-by: qethu <190734095+qethu@users.noreply.github.com>
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
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