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author | Diana Picus <Diana-Magda.Picus@amd.com> | 2025-02-20 09:25:48 +0100 |
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committer | GitHub <noreply@github.com> | 2025-02-20 09:25:48 +0100 |
commit | 611a648327e9f6dad174e5c4427b27b8b7830fc0 (patch) | |
tree | 1897cd07115c51a710693767ab577b7537364acb /flang/lib/Frontend/CompilerInvocation.cpp | |
parent | 44dc5729b07890cbedae6b1bdb6fcef038021ebc (diff) | |
download | llvm-611a648327e9f6dad174e5c4427b27b8b7830fc0.zip llvm-611a648327e9f6dad174e5c4427b27b8b7830fc0.tar.gz llvm-611a648327e9f6dad174e5c4427b27b8b7830fc0.tar.bz2 |
[AMDGPU] Add llvm.amdgcn.dead intrinsic (#123190)
Shaders that use the llvm.amdgcn.init.whole.wave intrinsic need to
explicitly preserve the inactive lanes of VGPRs of interest by adding
them as dummy arguments. The code usually looks something like this:
```
define amdgcn_cs_chain void f(active vgpr args..., i32 %inactive.vgpr1, ..., i32 %inactive.vgprN) {
entry:
%c = call i1 @llvm.amdgcn.init.whole.wave()
br i1 %c, label %shader, label %tail
shader:
[...]
tail:
%inactive.vgpr.arg1 = phi i32 [ %inactive.vgpr1, %entry], [poison, %shader]
[...]
; %inactive.vgpr* then get passed into a llvm.amdgcn.cs.chain call
```
Unfortunately, this kind of phi node will get optimized away and the
backend won't be able to figure out that it's ok to use the active lanes
of `%inactive.vgpr*` inside `shader`.
This patch fixes the issue by introducing a llvm.amdgcn.dead intrinsic,
whose result can be used as a PHI operand instead of the poison. This
will be selected to an IMPLICIT_DEF, which the backend can work with.
At the moment, the llvm.amdgcn.dead intrinsic works only on i32 values.
Support for other types can be added later if needed.
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions