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| author | Craig Topper <craig.topper@sifive.com> | 2024-09-03 22:44:49 -0700 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2024-09-03 22:44:49 -0700 |
| commit | 3e798476de466e8a051d3e753db379731a8d9705 (patch) | |
| tree | 536c5932cfb59ca11f232eb6b76541c686d65946 /flang/lib/Frontend/CompilerInvocation.cpp | |
| parent | c94bd96c277e0b48e198fdc831bb576d9a04aced (diff) | |
| download | llvm-3e798476de466e8a051d3e753db379731a8d9705.zip llvm-3e798476de466e8a051d3e753db379731a8d9705.tar.gz llvm-3e798476de466e8a051d3e753db379731a8d9705.tar.bz2 | |
[LegalizeDAG][RISCV] Don't promote f16 vector ISD::FNEG/FABS/FCOPYSIGN to f32 when we don't have Zvfh. (#106652)
The fp_extend will canonicalize NaNs which is not the semantics of
FNEG/FABS/FCOPYSIGN.
For fixed vectors I'm scalarizing due to test changes on other targets
where the scalarization is expected. I will try to address in a follow
up.
For scalable vectors, we bitcast to integer and use integer logic ops.
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions