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author | David Spickett <david.spickett@linaro.org> | 2023-11-10 09:01:22 +0000 |
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committer | GitHub <noreply@github.com> | 2023-11-10 09:01:22 +0000 |
commit | 2f8e3d55da68b08f63186fa9f98245145a180449 (patch) | |
tree | 930089631bfffc153e9b5345aae428253a2322ae /flang/lib/Frontend/CompilerInvocation.cpp | |
parent | 4178a66139293ca7442230d50a8e4babf747db1d (diff) | |
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[lldb][AArch64][Linux] Add field information for the mte_ctrl register (#71808)
This is a Linux pseudo register provided by the NT_ARM_TAGGED_ADDR_CTRL
register set. It reflects the value passed to prctl
PR_SET_TAGGED_ADDR_CTRL.
https://docs.kernel.org/arch/arm64/memory-tagging-extension.html
The fields are made from the #defines the kernel provides for setting
the value. Its contents are constant so no runtime detection is needed
(once we've decided we have this register in the first place).
The permitted generated tags is technically a bitfield but at this time
we don't have a way to mark a field as preferring hex formatting.
```
(lldb) register read mte_ctrl
mte_ctrl = 0x000000000007fffb
= (TAGS = 65535, TCF_ASYNC = 0, TCF_SYNC = 1, TAGGED_ADDR_ENABLE = 1)
```
(4 bit tags mean 16 possible tags, 16 bit bitfield)
Testing has been added to TestMTECtrlRegister.py, which needed a more
granular way to check for XML support, so I've added hasXMLSupport that
can be used within a test case instead of skipping whole tests if XML
isn't supported.
Same for the core file tests.
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions