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authorTres Popp <tpopp@google.com>2021-01-15 17:11:41 +0100
committerTres Popp <tpopp@google.com>2021-01-19 10:20:20 +0100
commit170199f56262cc3c80591d332da3128bc25ada96 (patch)
tree888de4c9ff02f8bb5dddf0f3558cd68c5e54ccd1 /flang/lib/Frontend/CompilerInvocation.cpp
parentc3ce2627949eee3b5d3012db78f670919a49b35d (diff)
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[llvm][nvptx] add atomicity to counter in ISelLowering
Previously uniqueCallSite could have race conditions between different threads. Now it is accessed with an atomic RMW and will be unique between different threads. Differential Revision: https://reviews.llvm.org/D94784
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