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| author | Craig Topper <craig.topper@sifive.com> | 2024-05-15 10:15:35 -0700 |
|---|---|---|
| committer | Craig Topper <craig.topper@sifive.com> | 2024-05-15 10:42:39 -0700 |
| commit | 0647d1035cb208195e002b38089b82004b6f7b92 (patch) | |
| tree | f6777298ad2ded618c14bcaa6365909469047b88 /flang/lib/Frontend/CompilerInvocation.cpp | |
| parent | 217668f641e82f901645f428ae0d07a3c01e9a8a (diff) | |
| download | llvm-0647d1035cb208195e002b38089b82004b6f7b92.zip llvm-0647d1035cb208195e002b38089b82004b6f7b92.tar.gz llvm-0647d1035cb208195e002b38089b82004b6f7b92.tar.bz2 | |
[RISCV] Remove unneeded casts from int64_t to uint64_t in RISCVMatInt.cpp. NFC
Most of these were to avoid undefined behavior if a shift left
changed the sign of the result. I don't think its possible to change
the sign of the result here. We're shifting left by 12 after an arithmetic
right shift by more than 12. The bits we are shifting out with the left
shift are guaranteed to be sign bits.
Also use SignExtend64<32> to force upper bits to all 1s instead of an
Or. We know the value isUInt<32> && !isInt<32> which means bit 31 is set.
Diffstat (limited to 'flang/lib/Frontend/CompilerInvocation.cpp')
0 files changed, 0 insertions, 0 deletions