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| author | Austin Kerbow <Austin.Kerbow@amd.com> | 2020-03-18 13:47:39 -0700 |
|---|---|---|
| committer | Austin Kerbow <Austin.Kerbow@amd.com> | 2020-03-20 00:19:15 -0700 |
| commit | 2cbb8c946a6e89faa61333d3aede503d37551639 (patch) | |
| tree | c6ee69f9b529e11644d1f5b1b45be1dca0fecf1b /clang/unittests/Tooling/Syntax/TreeTest.cpp | |
| parent | 728b878de689e4921ca7f864ed3036f9b2c53853 (diff) | |
| download | llvm-2cbb8c946a6e89faa61333d3aede503d37551639.zip llvm-2cbb8c946a6e89faa61333d3aede503d37551639.tar.gz llvm-2cbb8c946a6e89faa61333d3aede503d37551639.tar.bz2 | |
[AMDGPU] Reuse register during frame index elimination
If there were no free VGPRs we would need two emergency spill slots for register
scavenging during PEI/frame index elimination. Reuse 'ResultReg' for scale
calculation so that only one spill is needed.
Differential Revision: https://reviews.llvm.org/D76387
Diffstat (limited to 'clang/unittests/Tooling/Syntax/TreeTest.cpp')
0 files changed, 0 insertions, 0 deletions